Retro Z80: System Controller

I am currently experimenting with an implementation of the System Controller. Before I dive any deeper lets talk about the global picture.

Basically I see three main parts in my Z80 computer v1. First there is the Z80 CPU of course, then there is the core memory and finally the System Controller.

The Z80 CPU runs programs from the core memory in a normal fashion – no surprises there. The core memory will be more than 64k in a future version but for now it is 64k. I use a single UM61512AK-15 chip. I have four of those to expand the memory when we add bank switching.

The System Controller is basically a black box that contains “all the stuff” to make it work. The following functionality would come to (my) mind for the System Controller:

Terminal Console

To allow communication between the Z80 computer and the outside world (a PC) a serial UART (USB) channel will be available. A number of commands can be implemented by the System Controller that would allow remote access to the functionality. It is also relatively easy to extend and expand.

Boot Loader

Because the Z80 computer does not have any ROM (or flash) I would need something (external to the CPU) that loads programs into the RAM of the computer. I say programs, but the minimum requirement would be some sort of BIOS that would further allow the user to load additional programs. I will be writing the Z80 code on the PC, compile it using a cross compiler and download it to the System Controller on the Z80 computer. The System Controller will then take control of the system bus and perform Direct Memory Access (DMA) to put the program into RAM. When its done, it releases the bus and resets the CPU, which will then boot up running the downloaded BIOS. This mechanism allows for a fairly rapid development cycle – at least it beats burning EPROMs!


When the code is running on the Z80, the System Controller can help with diagnostics and debugging the program. The details are not fully thought out yet, but the general idea is that the System Controller will use its connection to the system bus to monitor program execution. It will also handle the info-points that I will probably implement. Info-points are similar to break-points but they do not halt the execution to wait for user input (continue), instead they halt the processor (with a HALT) instruction which is a signal to the System Controller to get ready to receive a CPU dump and issue a Non-Maskable Interrupt (NMI). The NMI will trigger code in the BIOS that dumps the CPU registers to the System Controller after it will continue execution. The System Controller will buffer and relay (store and forward) the dump over the serial terminal connection to the PC.


Other things you can think of are managing memory bank switching, managing device interrupts, implementing glue logic in programmable hardware and providing other IO such as USB, SPI, I2C or even SD-Card or IDE interfaces. Also an adjustable CPU clock will be very handy for debugging purposes. For now the two described are the main focus.


Initially I had planned to take an FPGA and program it with the System Controller logic. However, the functionality I had in mind for the System Controller would mean I need a considerable FPGA. Also, those (larger) chips are not cheap and will require a dev-board to get to know them. They also almost always run on 3.3V (not sure, but that’s all I’ve seen). Which means I would need a whole lot of level-shifters, at least for the FPGA inputs. The cheaper CPLD’s just do not have enough elements or blocks to be useful in this scenario.

I have come across the Cypress PSoC 5LP and the CY8CKIT-059 devlopment board which is pretty cheap (around $10,=). The PSoC 5 is a wonderful device that combines an ARM M3 with some programmable digital as well as analog logic. The Creator software (don’t be discouraged by the download popup, you can also download without using their download manager), which seems to be based on the Visual Studio Shell – although an older version) is pretty good. I would say the only down-side is that it only supports programming in C for the processor.

I am currently exploring the PSoC5 and the Creator software and its capabilities. One thing is clear, the PSoC5 does not have enough IO to allow everything to be implemented into the chip. I may consider implementing the Memory Controller (manages bank switching) as discrete logic components. I figure I only need a couple of latches and a fast RAM for storing the bank registers (but more details on that later). The USB is on the PSoC5 dev-board and already connected to dedicated pins on the chip. So that I will keep. But exposing extra IO peripherals (SPI, I2C, UART etc) will probably need a separate chip (another PSoc5?).

For now everything is on a breadboard running at fairly low speeds.


I currently have the serial terminal UART connection working and am working on the software. Having to program in C takes some getting used to after having thought in objects for more than 20 years (yes, I am that old).

The SystemTerminal component takes care of communicating with the PC and controlling the UART. Internally it uses an extra send and receive buffer for longer messages. It also implements a CommandDispatcher that tests incoming text commands and dispatches them to the appropriate CommandHandler. A CommandHandler will interpret the buffer and continue the communication protocol with the PC until its is finished. For now I only have one command implemented and that is the command to boot-load a program into memory.

The MemoryController component manages accessing the external (to the PSoC) memory over the system bus. It uses the BusController to gain access to the system bus and then implements an interface for simple data transfers between the external memory and the PSoC.

The idea is to be able to download a program in a little while and be able to run my first program on the Z80.

Back to work.

Published in: on January 14, 2016 at 6:27 pm  Leave a Comment  

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